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LEADER |
01172nam a2200361 4500 |
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PPN126282730 |
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20141125111500.0 |
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|a 978-0-470-18531-5
|b br.
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|a US
|b 2007029063
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020 |
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|a GB
|b A788219
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035 |
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|z ocm154800273
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035 |
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|z ocm176895525
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073 |
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1 |
|a 9780470185315
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100 |
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|a 20080722d2008 k y0frey0103 ba
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101 |
0 |
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|a eng
|
102 |
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|a US
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105 |
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|a a a 001yy
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106 |
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|a r
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200 |
1 |
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|a FPGA prototyping by VHDL examples
|b Texte imprimé
|e Xilinx Spartan-3 version
|f Pong P. Chu
|
210 |
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|a Hoboken, N.J.
|c Wiley-Interscience
|d ccop.2008
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215 |
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|a 1 vol. (xxv- 440 p.)
|c ill.
|d 26 cm
|
320 |
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|a Bibliogr. p. 437-438. Index.
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606 |
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|3 PPN031864155
|a VHDL (langage de description de matériel informatique)
|2 rameau
|
606 |
|
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|3 PPN034756957
|a Réseaux logiques programmables par l'utilisateur
|2 rameau
|
676 |
|
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|a 621.39/5
|v 22
|
680 |
|
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|a TK7895.G36
|b C485 2008
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700 |
|
1 |
|3 PPN112228615
|a Chu
|b Pong P.
|4 070
|
801 |
|
3 |
|a FR
|b Abes
|c 20080722
|g AFNOR
|
801 |
|
0 |
|b DLC
|g AACR2
|
801 |
|
2 |
|b BAKER
|g AACR2
|
930 |
|
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|5 441842101:353081795
|b 441842101
|a 621.395 FPG-CHU
|j u
|
979 |
|
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|a STN
|
998 |
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|a 539168
|